Fault Tolerant Architectures for Cryptography and Hardware Security by SIKHAR PATRANABIS & Debdeep Mukhopadhyay

Fault Tolerant Architectures for Cryptography and Hardware Security by SIKHAR PATRANABIS & Debdeep Mukhopadhyay

Author:SIKHAR PATRANABIS & Debdeep Mukhopadhyay
Language: eng
Format: epub
Publisher: Springer Singapore, Singapore


6.5.3 Identifying the LLC Slice

Once the cache set is identified, the variation from timing observations for different LLC slices leak the information of which LLC slice the secret maps to. In the same experimental setup as in the previous section, we identify the slice in which the actual secret resides, using timing analysis with the slice selection function. Since we have already identified the LLC cache set with which the secret collides, 12 data elements belonging to each slice of the particular set are selected. Prime Probe timing observations are noted for the set of 12 elements for each slice. The slice observing collision with the secret exponent will suffer from cache misses in the probe phase and thus have higher access time to other slices.

Fig. 6.9Timing Observations for LLC slice collision



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